Category:AND gates
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logic gate that outputs if both inputs are on | |||||
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Subcategories
This category has the following 15 subcategories, out of 15 total.
4
- 4073 (CMOS) (7 F)
- 4081 (CMOS) (8 F)
- 4082 (CMOS) (2 F)
7
C
- CMOS AND gates (3 F)
N
- NMOS AND gates (4 F)
S
- AND gate symbols (70 F)
W
- Wired AND gates (15 F)
Media in category "AND gates"
The following 72 files are in this category, out of 72 total.
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1 or gate plus 1 and gate.svg 610 × 287; 9 KB
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1. Teorema.png 620 × 166; 5 KB
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1. Theorem.svg 512 × 91; 1 KB
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12 input AND gate via cascade of AND gates.svg 268 × 153; 4 KB
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12-input AND gate from NAND and NOR.svg 268 × 153; 5 KB
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14йцуке.JPG 208 × 364; 11 KB
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2014-01-15 08-41-49 electronique-site-plutons porte-logique.jpg 1,930 × 1,220; 1.02 MB
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2ЛИ041 Мезон.jpg 1,062 × 691; 359 KB
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3and gates.svg 610 × 287; 9 KB
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AND circuit for beginners.svg 190 × 110; 26 KB
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AND esquema.jpg 669 × 643; 23 KB
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AND from NOR.svg 200 × 100; 18 KB
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AND Gate diagram.svg 721 × 232; 3 KB
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AND gate from NAND gate and inverter.svg 162 × 34; 2 KB
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AND gate with two transistors and a NOT gate.png 609 × 477; 16 KB
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AND logic gate by Akkaya.png 1,190 × 1,678; 28 KB
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AND using NOR.svg 229 × 100; 12 KB
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AND-Gatter.png 800 × 857; 15 KB
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AND-Gatter.svg 810 × 860; 9 KB
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And-or-not-Esquema.jpg 896 × 293; 86 KB
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AND-switch-2.svg 428 × 150; 9 KB
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AND-switch.PNG 253 × 85; 1 KB
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AND3 aus AND2 DIN40700.png 90 × 146; 443 bytes
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Circuit and.svg 206 × 77; 6 KB
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Circuito verifica porta AND.png 672 × 344; 45 KB
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CPT-Logic-AND-Switch.svg 664 × 514; 9 KB
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CPT-logic-gate building circuit.svg 421 × 528; 22 KB
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CPT-logic-gate conversion (-A+-B).C.svg 435 × 210; 17 KB
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CPT-logic-gate conversion (A.B)+C.svg 290 × 100; 12 KB
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CPT-logic-gate conversion (A.¬B)(+)(B.C).svg 385 × 174; 19 KB
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CPT-logic-gate conversion (B+D).(¬A+¬B).svg 416 × 282; 22 KB
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CPT-logic-gate conversion NAND-(-A.B).svg 424 × 140; 28 KB
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CPT-logic-gate conversion NAND--(-A.B).svg 290 × 104; 16 KB
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CPT-logic-gate conversion ¬((A.B).(C+¬D)).svg 398 × 169; 32 KB
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CPT-logic-gate conversion ¬(A.+B).C.svg 256 × 95; 23 KB
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Diode AND2.jpg 4,341 × 2,408; 793 KB
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Emulatore porta AND con Arduino.png 1,261 × 361; 80 KB
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Figure 3. A molecular AND gate.png 975 × 418; 28 KB
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Fluidic AND XOR.svg 400 × 600; 1 KB
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Fonctions logiques(3-a).png 161 × 62; 572 bytes
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Fonctions logiques(3-d).png 240 × 420; 5 KB
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FWE U107D.jpg 1,800 × 1,660; 215 KB
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Logische Verknuepfung AND.svg 2,000 × 1,200; 73 KB
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Loogika-JA.png 200 × 92; 842 bytes
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Masques 1.png 550 × 183; 16 KB
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Masques 2.png 553 × 187; 15 KB
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MFrey (A nor B) and C 001.svg 220 × 90; 19 KB
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MFrey (A nor B) and C.svg 220 × 90; 18 KB
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MFrey A and B and C.svg 1,600 × 400; 6 KB
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MFrey AND with 3 Inputs 001.svg 240 × 90; 9 KB
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MFrey AND with 3 Inputs 003.svg 240 × 90; 9 KB
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MFrey C and B and A.svg 1,600 × 400; 6 KB
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NOR AND.PNG 135 × 80; 1 KB
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Porte logique ET (jeu de la vie).jpg 157 × 238; 4 KB
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Priority AND gate.png 168 × 257; 19 KB
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Puerta AND biología sintética.png 1,065 × 236; 73 KB
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Puerta AND con transistores.jpg 607 × 360; 15 KB
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Relay and.svg 200 × 150; 9 KB
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Schema AND poort.jpg 681 × 193; 37 KB
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Simplified AND gate circuit using diodes.svg 257 × 272; 8 KB
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Skakelaar and.png 206 × 77; 1 KB
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Switch alternate and or.png 575 × 198; 4 KB
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Toffoli BilliardBall-en.svg 1,222 × 471; 2 KB
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Toffoli BilliardBall-ru.svg 1,222 × 471; 2 KB
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Toffoli BilliardBall.gif 874 × 413; 13 KB
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TransistorANDgate.png 365 × 531; 22 KB
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Venn-AND-sketch.png 918 × 289; 196 KB
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Venn-AND-static.png 1,032 × 396; 177 KB
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Venn-AND.gif 480 × 304; 4.51 MB
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XOR - AND2.jpg 1,202 × 789; 147 KB
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К155ЛИ5 Планета.jpg 1,102 × 514; 103 KB