File:Network processors and utilizing their features in a multicast design (IA networkprocessor109451688).pdf

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Network processors and utilizing their features in a multicast design   (Wikidata search (Cirrus search) Wikidata query (SPARQL)  Create new Wikidata item based on this file)
Author
Diler, Timur
image of artwork listed in title parameter on this page
Title
Network processors and utilizing their features in a multicast design
Publisher
Monterey, California. Naval Postgraduate School
Description

In order to address the requirements of the rapidly growing Internet, network processors have emerged as the solution to the customization and performance needs of networking systems. An important component in a network is the router, which receives incoming packets and directs them to specific routes elsewhere in the system. Network processors and the associated software control the routers and switches and allow software designers to deploy new systems such as multicasting forwarder and firewalls quickly.This thesis introduces network processors and their features, focusing on the Intel IXP1200 network processor. A multicast design for the IXP1200 using microACE is proposed. This thesis presents an approach to building a multicasting forwarder using the IXP1200 network processor layer-3 forwarder microACE that carries out unicast routing. The design is based on the Intel Internet exchange architecture and its active computing element (ACE). The layer-3 unicast forwarder microACE is used as a basic starting point for the design. Some software modules, called micoblocks, are modified to create a multicast forwarder that is flexible and efficient.


Subjects: Multicasting (Computer networks); Network processors; Intel microprocessors; Computer architecture; 0; Multicasting; ACE; Microace; Intel IXA; Microengine
Language English
Publication date March 2004
Current location
IA Collections: navalpostgraduateschoollibrary; fedlink
Accession number
networkprocessor109451688
Source
Internet Archive identifier: networkprocessor109451688
https://archive.org/download/networkprocessor109451688/networkprocessor109451688.pdf
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(Reusing this file)
Copyright is reserved by the copyright owner

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Public domain
This work is in the public domain in the United States because it is a work prepared by an officer or employee of the United States Government as part of that person’s official duties under the terms of Title 17, Chapter 1, Section 105 of the US Code. Note: This only applies to original works of the Federal Government and not to the work of any individual U.S. state, territory, commonwealth, county, municipality, or any other subdivision. This template also does not apply to postage stamp designs published by the United States Postal Service since 1978. (See § 313.6(C)(1) of Compendium of U.S. Copyright Office Practices). It also does not apply to certain US coins; see The US Mint Terms of Use.

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current06:55, 23 July 2020Thumbnail for version as of 06:55, 23 July 20201,275 × 1,650, 75 pages (1.4 MB) (talk | contribs)FEDLINK - United States Federal Collection networkprocessor109451688 (User talk:Fæ/IA books#Fork8) (batch 1993-2020 #22944)

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