File:FIELD PROGRAMMABLE GATE ARRAY HIGH CAPACITY TECHNOLOGY FOR RADAR AND COUNTER-RADAR DRFM SIGNAL PROCESSING (IA fieldprogrammabl1094559670).pdf
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FIELD PROGRAMMABLE GATE ARRAY HIGH CAPACITY TECHNOLOGY FOR RADAR AND COUNTER-RADAR DRFM SIGNAL PROCESSING ( ) | |
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Author |
Grubbs, Hawken L. |
Title |
FIELD PROGRAMMABLE GATE ARRAY HIGH CAPACITY TECHNOLOGY FOR RADAR AND COUNTER-RADAR DRFM SIGNAL PROCESSING |
Publisher |
Monterey, CA; Naval Postgraduate School |
Description |
Radar systems often use low power, continuous waveform radio frequency (RF) modulations and require high-speed adaptive signal processors to provide the necessary processing gain to detect small radar cross-section targets in clutter on range-Doppler maps. Counter-radar technologies include digital RF memories (DRFMs) that attempt to provide multiple, structured false targets with clutter, for example, using a pipelined, finite impulse response arrangement of complex range bin processors. This thesis investigates high-capacity field-programmable gate array (FPGA) technology to enable on-the-fly flexibility and reconfigurability for both radar signal processing and DRFM electronic attack using a Xilinx Virtex Ultrascale+. A three-stage range, Doppler, post-detection integration radar modulation compression circuit is designed and quantified. A range compression circuit with a peak power consumption of 6.100W and a post-implementation utilization of 11% was designed. The Doppler filter bank was designed at 400 MHz with a peak power consumption of 2.688W and a post-implementation utilization of 9%. A coherent integration processor at 400 MHz had a peak power consumption of 2.517W and a post-implementation utilization of 9%. In addition, a DRFM complex range bin processor was designed and quantified at 500 MHz and had a peak power 2.543W with a post-implementation utilization of 11%. Subjects: LPI radar; low probability of intercept radar; FPGA; field programmable gate array; Virtex Ultrascale+; Vivado; Simulink; DSP; digital signal processing; DRFM; Xilinx |
Language | English |
Publication date | June 2018 |
Current location |
IA Collections: navalpostgraduateschoollibrary; fedlink |
Accession number |
fieldprogrammabl1094559670 |
Source | |
Permission (Reusing this file) |
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States. |
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This file has been identified as being free of known restrictions under copyright law, including all related and neighboring rights. |
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Short title | FIELD PROGRAMMABLE GATE ARRAY HIGH CAPACITY TECHNOLOGY FOR RADAR AND COUNTER-RADAR DRFM SIGNAL PROCESSING |
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Author | Grubbs, Hawken L. |
Keywords |
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Software used | Grubbs, Hawken L. |
Conversion program | Microsoft® Word 2016 |
Encrypted | no |
Page size |
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Version of PDF format | 1.4 |