File:Wirebonding.svg

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Cyril BUTTAY

Sketch showing the internal connections of a Power transistor package (D2PAK type). The drain connection is made via the copper pad on the bottom of the silicon die.
Date 30 March 2006 (original upload date)
Source No machine-readable source provided. Own work assumed (based on copyright claims).
Author No machine-readable author provided. CyrilB~commonswiki assumed (based on copyright claims).
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File:Wirebonding.svg File:Wirebonding Workaround.svg

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Licensing[edit]

I, the copyright holder of this work, hereby publish it under the following licenses:
GNU head Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the section entitled GNU Free Documentation License.
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attribution share alike
This file is licensed under the Creative Commons Attribution-Share Alike 2.5 Generic, 2.0 Generic and 1.0 Generic license.
You are free:
  • to share – to copy, distribute and transmit the work
  • to remix – to adapt the work
Under the following conditions:
  • attribution – You must give appropriate credit, provide a link to the license, and indicate if changes were made. You may do so in any reasonable manner, but not in any way that suggests the licensor endorses you or your use.
  • share alike – If you remix, transform, or build upon the material, you must distribute your contributions under the same or compatible license as the original.
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Date/TimeThumbnailDimensionsUserComment
current21:08, 30 March 2006Thumbnail for version as of 21:08, 30 March 20061,052 × 563 (481 KB)CyrilB~commonswiki (talk | contribs)Cyril BUTTAY Sketch showing the internal connections of a Power transistor package (D2PAK type). The drain connection is made via the copper pad on the bottom of the silicon die.

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