File:Sipeed.Tang nano 4K.FPGA.jpg
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DescriptionSipeed.Tang nano 4K.FPGA.jpg |
Français : Il s'agit d'une carte de développement FPGA « Tang nano 4K » de Sipeed, comportant un SoC Bouffalo BL702 based in RISC-V RV32 pour les communications, flash et debug (compatible JTAG), via le port USB, Il comporte également un SoC (System-in-package dans leur jargon) Gowin GW1NSR-LV4C, comportant un processeur ARM Cortex-M3, 64 Mbit de PSRAM et un FPGA avec 2 PLL (diviseur d'horloge), 4608 blocs logiques et 3456 registres. Il y a aussi des port GPIO, HDMI, et camera sur la carte.
English: This is a FPGA development board Tang nano 4K from Sipeed. This board has a RISC-V RV32 based Bouffalo BL702 SoC used for communication, flashing and debug compatible JTAG, via USB port. It also has a Gowin GW1NSR-LV4C SoC (called System-in-package here) integrating an ARM Cortex-M3 microcontroller, 64Mbit of PSRAM and an FPGA with 2 PLL (clock divisor), 4680 logical blocks, 3456 registers. The board also have Flash memory, and GPIO, HDMI and camera ports. |
Date | |
Source | Own work |
Author | Popolon |
Licensing[edit]
I, the copyright holder of this work, hereby publish it under the following license:
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Annotations InfoField | This image is annotated: View the annotations at Commons |
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English: Gowin GW1NSR-LV4C System-in-package (SoC like), including Cortex-M3 and FPGA.
Français : System-in-package (comme un SoC), incluant le Cortex-M3 et le FPGA.
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English: DVP Camera port
Français : Port camera DVP
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English: Integrated DC-DC power supply
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32Mb NOR Flash
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Date/Time | Thumbnail | Dimensions | User | Comment | |
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current | 11:26, 6 November 2021 | 1,280 × 720 (124 KB) | Popolon (talk | contribs) | Uploaded own work with UploadWizard |
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