File:CMOS AND Silicon.svg
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Size of this PNG preview of this SVG file: 294 × 587 pixels. Other resolutions: 120 × 240 pixels | 240 × 480 pixels | 384 × 768 pixels | 513 × 1,024 pixels | 1,025 × 2,048 pixels.
Original file (SVG file, nominally 294 × 587 pixels, file size: 19 KB)
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| Description |
English: The physical layout of a hypothetical CMOS AND circuit. The larger regions of N-type diffusion and P-type diffusion are part of the transistors; the green forms the transistor gates. The two smaller regions on the left are taps, to prevent latchup.
In actual circuits, NAND logic is used instead of this layout, because to make this AND the transistor gates need to be driven at slightly higher voltage to make the transistors fully switch on. |
| Date | (UTC) |
| Source | |
| Author |
Orion Lawlor
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This is a retouched picture, which means that it has been digitally altered from its original version. Modifications: Converted to positive logic AND gate from NAND gate.. The original can be viewed here: CMOS NAND Layout.svg:  .
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I, the copyright holder of this work, hereby publish it under the following license:
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This work has been released into the public domain by its author, Example, at the [[::|English Wikipedia]] project. This applies worldwide. In case this is not legally possible: |
Original upload log[edit]
This image is a derivative work of the following images:
- File:CMOS_NAND_Layout.svg licensed with PD-user-w
- 2007-10-19T20:46:55Z Prolineserver 294x587 (11839 Bytes) {{Information |Description=''no original description'' |Source=Originally from [http://en.wikipedia.org en.wikipedia]; description page is/was [http://en.wikipedia.org/w/index.php?title=Image%3ACMOS_NAND_Layout.svg here]. |Da
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
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| current | 20:20, 7 September 2010 | | 294 × 587 (19 KB) | Olawlor (talk | contribs) | {{Information |Description={{en|The physical layout of a CMOS AND circuit. The larger regions of N-type diffusion and P-type diffusion are part of the transistors; the green forms the transistor gates. The two smaller regions on the left are taps, to pre |
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