File:Sandia-Thunderbird-trap schematic+cross-section NJP15.093018.svg
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[edit]DescriptionSandia-Thunderbird-trap schematic+cross-section NJP15.093018.svg |
English: Sandia Thunderbird trap. (a) Schematic representation of the electrode configuration: the trap is a symmetric six-rail design consisting of dual inner DC electrodes (blue), RF electrodes (red) and segmented outer DC electrodes (gray). The inner DC electrodes allow for rotation of the principal axes of the generated trapping potential. Located outside of the inner DC electrodes are 60 μm wide RF electrodes. (b) Cross-sectional diagram of the trap. The silicon substrate is shielded from RF fields by the first grounded metal layer (M1). The second metal layer (M2) carries all of the trapping voltages and is separated from M1 by a ~ 14 μm thick oxide layer which, compared to a thinner oxide layer, reduces the capacitance between the RF electrodes and ground and increases the RF electrode breakdown voltage. Gold is evaporated from the top and bottom of the trap to minimize the amount of dielectric the ion is exposed to. |
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Single qubit manipulation in a microfabricated surface electrode ion trap, New J. Phys. 15 093018 (2013). DOI: https://doi.org/10.1088/1367-2630/15/9/093018 Figure1 |
Author | Emily Mount, So-Young Baek, Matthew Blain, Daniel Stick, Daniel Gaultney, Stephen Crain, Rachel Noek, Taehyun Kim, Peter Maunz and Jungsang Kim |
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