File:Lomac, 80L 1981 Scan 80 1 1 (27008572323).png
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Summary
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| Description |
Prototype of our tester data bus interface. This was a neat idea that did work- instead of designing our own card to plug into the PDP-11 computer, we bought a 4 X 16 parallel interface. Done. Jim Flynn was responsible for the interface. It latched the data and address bits for the tester interface, with read and write logic implemented in a state machine. The state machine was driven by a local clock and a ROM. Best estimate and one step each way were in the ROM, jumper selected. The ROM output controlled our bus direction, latched data in and out of the PDP-11 interfaces, ran write and read strobes on our bus. The ROM clocked at 10Mhz, extra fine resolution for the 1 MHz data rate in and out of the tester and the PDP-11. Another group did a PDP-11 interface with a proprietary card in the PDP-11, but I believe the architecture Jim and I implemented was used in later days. |
| Date | |
| Source | Lomac, 80L 1981 Scan_80_1 1 |
| Author | Bill Abbott |
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This image was originally posted to Flickr by wbaiv at https://flickr.com/photos/9998127@N06/27008572323. It was reviewed on 20 February 2023 by FlickreviewR 2 and was confirmed to be licensed under the terms of the cc-by-sa-2.0. |
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| current | 16:13, 20 February 2023 | | 1,460 × 1,014 (3.43 MB) | Retired electrician (talk | contribs) | Transferred from Flickr via #flickr2commons |
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