File:Hardware circular buffer implementation patent us3979733 fig4.png
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[edit]DescriptionHardware circular buffer implementation patent us3979733 fig4.png |
English: This hardware circular buffer implementation shows the elements "read position counter", "write position counter", "adder + 1" and auxiliary circuitry like "selector" and "comparator". |
Date | |
Source | US patent 3979733 Digital data communications system packet switch, figure 4 |
Author | Alexander Gibson Fraser (Bell Telephone Laboratories) |
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[edit]Public domainPublic domainfalsefalse |
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https://creativecommons.org/publicdomain/mark/1.0/PDMCreative Commons Public Domain Mark 1.0falsefalse
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current | 11:07, 15 December 2021 | 2,784 × 1,676 (65 KB) | AndreAdrian (talk | contribs) | picture rotated for easier viewing | |
10:09, 15 December 2021 | 2,320 × 3,408 (98 KB) | AndreAdrian (talk | contribs) | Uploaded a work by Alexander Gibson Fraser (Bell Telephone Laboratories) from US patent 3979733 Digital data communications system packet switch, figure 4 with UploadWizard |
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