File:4006 chronogramme 2.png
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[edit]Description4006 chronogramme 2.png |
Français : En haut, le chronogramme exposant le principe de fonctionnement du deuxième registre à décalage du circuit CMOS 4006. Les valeurs logiques x, a, b, c et d correspondent aux états initiaux des bascules du registre. Les valeurs logiques e, f, g, h, i, j et k correspondent aux états présents sur l'entrée du registre lors des fronts descendant successifs de l'horloge CLOCK. En bas, un exemple de signaux logiques obtenus. |
Date | |
Source | Own work |
Author | PA5CAL France |
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[edit]I, the copyright holder of this work, hereby publish it under the following license:
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Date/Time | Thumbnail | Dimensions | User | Comment | |
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current | 21:32, 15 May 2022 | 800 × 780 (44 KB) | PA5CAL France (talk | contribs) | Uploaded own work with UploadWizard |
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Horizontal resolution | 28.35 dpc |
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Vertical resolution | 28.35 dpc |
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15 May 2022
image/png
ab94e042a890e740e530501540f4da9129a48fc9
45,010 byte
780 pixel
800 pixel
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